Difference between revisions of "Intel Corporation"
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+ | [[wikipedia:Intel]] ([[S&P 100]]) [https://www.google.com/finance/quote/INTC:NASDAQ?window=MAX INTC] | ||
+ | * Founder: [[Robert Noyce]], [[Gordon Moore]] | ||
− | {{Intel}} | + | |
+ | * [[Greg Lavender]] | ||
+ | |||
+ | * [[Intel Gold]] | ||
+ | |||
+ | |||
+ | * [[Clear linux]] | ||
+ | |||
+ | |||
+ | * [[Intel 4004]] | ||
+ | |||
+ | * [[Andrew Grove]] | ||
+ | |||
+ | |||
+ | * [[TSMC]] | ||
+ | * [[Nvidia]] | ||
+ | * [[Infineon Technologies]] | ||
+ | * [[Load Value Injection]] | ||
+ | * [[Federico Faggin]] | ||
+ | |||
+ | == See also== | ||
+ | |||
+ | * {{Intel}} | ||
+ | * {{CPU}} | ||
+ | * {{ARM}} | ||
+ | * {{Silicon}} | ||
+ | |||
+ | |||
+ | [[Category:Computing]] |
Latest revision as of 13:30, 22 August 2023
wikipedia:Intel (S&P 100) INTC
- Founder: Robert Noyce, Gordon Moore
See also[edit]
- Intel, AMD, TSMC, Side-channel attacks, Intel Core, Intel Atom, Mobileye, Clear linux, AMT, AMX, Qualcomm Atheros, SGX, ASM, ASML Holding, Intel VT-d, Nvidia, Intel 4004, Haswell, Atom Goldmont
- CPU, GPU, NPU, TPU, DPU, Groq, Proliant, thread (
Pthreads
), processor, CPU socket, core, ARM , CPU Virtualization, Intel, AMD,nm
,lscpu
, AVX-512, Passthrough, CPU intensive, Graviton processor, Branch predictor, vCPU, SSE, Power - ARM, KVM on ARM, Ampere Computing, Marvell, ARM Cortex-A15, ARM Cortex-A53, Apple M1,
aarch64, arm64
, Apple A14, Apple A15, Samsung Exynos, Exception levels, AWS Graviton2, AWS Graviton3, ARM Neoverse - Silicon, SMIC, Intel, TSMC, ASM, ASML, Alusil
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